//seg_led_static 模块
module seg_led_static(
	input				sys_clk,
	input				sys_rst_n,
	
	input	 			add_flag,	// 数码管变化的通知信号
	output	reg[7:0]	seg_led,	// 数码管段选
	output	reg[5:0]	sel			// 数码管位选
);

//reg define
reg	[3:0]	num;	// 数码管显示的十六进制数


//控制数码管位选信号（低电平有效) 选中所以数码管
always @(posedge sys_clk or negedge sys_rst_n)	begin
	if(!sys_rst_n)
//		add_flag <= 1'b0;
		sel <= 6'b11_1111;
	else
		sel <= 6'b000_0000;
end

//每次通知信号到达 数码管显示的十六进制数增加1
always @(posedge sys_clk or negedge sys_rst_n)	begin
	if(!sys_rst_n)
		num <= 4'h0;
	else if(add_flag)	begin
		if(num < 4'hf)
			num <= num +1'b1;
		else
			num <= 4'h0;
	end
	else 
		num <= num;
	
end

//根据数码管显示的数字，控制段信号
always @(posedge sys_clk or negedge sys_rst_n)	begin
	if(!sys_rst_n)
		seg_led <= 8'b0000_0000;
	else	begin	
		case(num)
			4'h0 :    seg_led <= 8'b1100_0000;
            4'h1 :    seg_led <= 8'b1111_1001;
            4'h2 :    seg_led <= 8'b1010_0100;
            4'h3 :    seg_led <= 8'b1011_0000;
            4'h4 :    seg_led <= 8'b1001_1001;
            4'h5 :    seg_led <= 8'b1001_0010;
            4'h6 :    seg_led <= 8'b1000_0010;
            4'h7 :    seg_led <= 8'b1111_1000;
            4'h8 :    seg_led <= 8'b1000_0000;
            4'h9 :    seg_led <= 8'b1001_0000;
            4'ha :    seg_led <= 8'b1000_1000;
            4'hb :    seg_led <= 8'b1000_0011;
            4'hc :    seg_led <= 8'b1100_0110;
            4'hd :    seg_led <= 8'b1010_0001;
            4'he :    seg_led <= 8'b1000_0110;
            4'hf :    seg_led <= 8'b1000_1110;
            default : seg_led <= 8'b1100_0000;
		endcase		
	end
end

endmodule